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GROWTH, DEPOSITION AND THERMAL PROCESSES

INTRODUCTION

The laboratory includes facilities dedicated to deposition and growth on wafer substrates of several materials such as dielectric (TEOS, LTO, Si3N4, gate oxides), conductive (a-Si and Polysilicon, metals, CNT, Graphene), and metal (Pt, Al, Ni, Cr, Au) thin layers. Moreover, it is possible to perform several types of thermal treatments including annealing (silicon/polysilicon up to 1100 °C, SiC up tp 1900 °C, and metals in FG) and diffusion doping.

PRINCIPAL EQUIPMENT

LPCVD SYSTEMS
CLEAN ROOM ISO 5 (100 CLASS)
MANUFACTURER: SAMCO MINILAB DF 500-6​ HORIZONTAL LPCVD

LOW TEMPERATURE OXIDE DEPOSITION (LTO) 

  • TEMPERATURE: 450 °C
  • CAPACITY: UP TO 20 FOUR INCH WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • PRECURSOR GASES: SiLANE AND OXYGEN
  • UNIFORMITY WAFER TO WAFER: 5% 
  • APPROVED MATERIAL: SILICON, FUSED SILICA, AND SiC

TEOS DEPOSITION - HORIZONTAL LPCVD 

  • TEMPERATURE: 820 °C
  • CAPACITY: UP TO 20 FOUR INCH WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • PRECURSOR GASES: TEOS
  • UNIFORMITY WAFER TO WAFER: 5% 
  • APPROVED MATERIAL: SILICON, FUSED SILICA, SiC​
  THICKNESS DEP. RATE UNIF. on 4" FILM STRESS STEP COVERAGE
Low Temperature Oxide 50 nm - 5000 nm 16,5 nm/min 5% 100 MPa COMPR. POOR
TEOS 50 nm - 2000 nm 16,5 nm/min 5% 100 MPa COMPR. GOOD
MANUFACTURER: AMS HORIZONTAL LPCVD

SILICON POLYCRISTALLINE UNDOPED

  • TEMPERATURE: FROM 560 °C UP TO 630 °C (FROM AMORPHOUS TO POLYCRISTALLINE)
  • CAPACITY: UP TO 20 FOUR INCH WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • APPROVED MATERIAL: SILICON, SiC, FUSED SILICA
  • PRECURSOR GASES: SILANE​

STOICHIOMETRIC SILICON NITRIDE

  • TEMPERATURE: 780 °C
  • CAPACITY: UP TO 20 FOUR INCH WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • PRECURSOR GASES: DICHLOROSILANE
  THICKNESS DEP. RATE UNIFORMITY FILM STRESS STEP COVERAGE
POLYSILICON 10 nm - 3000 nm 13 nm/min 10% 200 MPa COMPR. VERY GOOD
SILICON NITRIDE 10 nm - 500 nm 3,4 nm/min 5% 1 GPa TENSILE VEY GOOD

 

CONTACT PERSON: MICHELE SANMARTIN
CHEMICAL VAPOR DEPOSITION (CVD)

CLEAN ROOM ISO 8 (100000 CLASS)

2 HOT-WALL CVD SYSTEMS

  • 2” QUARTZ TUBES, T UP TP 1000 °c, /3X6) cm2 FLAT SAMPLES OR (7X6) cm2 Cu FOIL

COLD-WALL CVD SYSTEMS (ELETTRORAVA)

  • T up to 900 C, 3-4” flat substrates, base vacuum < 10-7 mbar, heater under a quartz bell separately evacuated down to 10-7 -10-8 mbar, fully computer controlled. These reactors are dedicated to the controlled synthesis of C-based nanostructures such as C nanotubes on different substrates (both vertically and horizontally aligned), high quality mono and few-layer graphene and graphene foams.

For more information visit the Synthesis of Advanced Materials Home Page

CONTACT PERSON: RITA RIZZOLI
PECVD

CLEAN ROOM ISO 8 (100000 CLASS)

RF – VHF MULTI-CHAMBER PECVD SYSTEM

MANUFACTURER: ELETTRORAVA - MVSYSTEM

  • (10x10) cm2 substrates
  • 4 chambers
  • separate turbomolecular pumping (10-8 torr)
  • 13.56 to 100 MHz, plasma ignitor, fully computer controlled.

This system is dedicated to the synthesis of Si-based intrinsic and doped amorphous and nanocrystalline films (a-Si:H, a-SiC:H, a-SiN:H, nc-Si and nc-SiC), SiC or SiN based multilayers, p-i-n and similar devices for applications in Photovoltaics and Optoelectronics (heterojunction solar cells, thin films solar cells on nanostructured back reflectors, optical modulators)
PVD SYSTEMS - METAL DEPOSITION

CLEAN ROOM ISO 5 (100 CLASS)

DC SPUTTER MAGNETRON MODEL MRC 8603

  • CAPACITY: ONE WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • APPROVED MATERIAL: SILICON, SiC, FUSED SILICA
  THICKNESS UNIFORMITY on 4" DEP. RATE
ALUMINUM/SILICON ALLOY (1%) 10 nm - 2000 nm 20% 23 nm/min
PLATINUM 10 nm - 500 nm 20%  
TITANIUM 10 nm - 200 nm 20%  

RF SPUTTER MODEL MCR 8622

  • CAPACITY: ONE WAFER
  • SUBSTRATE DIMENSION: UP TO 4"
  • APPROVED MATERIAL: NO LIMIT
  THICKNESS UNIFORMITY on 4" DEP. RATE
GOLD 10 nm - 1500 nm 20%  
TITANIUM NITRIDE (TIN) 10 nm - 500 nm 20%  
TIN 10 nm - 200 nm 20%  
SiO2 50nm - 1000 nm 20 %  

E-BEAN VARIAN 3119
CONTACT PERSON: GIULIO PIZZOCHERO
ANNEALING FURNACE

CLEAN ROOM ISO 5 (100 CLASS)

  • APPROVED MATERIALA: SILICON, SiC
  • TEMPERATURE ANNEALING: FROM 600 °C UP TO 1100 °C
  • ENVIRONMENT: O2, N2, FORMING GAS (FG), HCl FOR GETTERING PROCESS
  • METAL ANNEALING: ALUMINUM/SI ALLOY, PLATINUM IN FG

​CONTACT PERSON: MICHELE SANMARTIN
DOPING

CLEAN ROOM ISO 5 (100 CLASS)

PHOSPHOROUS DIFFUSION DOPING

  • SOURCE: POCl3
  • TEMPERATURE: FROM 800 °C UP TO 920 °C
  • CAPACITY: UP TO 20 4" SUBSTRATE
  • APPROCED MATERIAL: SILICON
  • R SQUARE: 10 Ohm/sq

​SPIN-ON-DOPING

​CONTACT PERSON: MICHELE SANMARTIN
THERMAL SILICON OXIDE GROWTH

CLEAN ROOM ISO 5 (100 CLASS)

  • WET AND DRY OXIDATION
  • TEMPERATURE: 700 - 1100 °C
  • CAPACITY: UP TO 20 WAFER
  • APPROVED MATERIALS: SILICON, SiC
  • SUBSTRATE: UP TO 4"
  • FILM THICKNESS: FROM 10 nm UP TO 2000 nm
  • GETTERING PROCESS IN HCl ENVIRONMENT AVAILABLE 

​CONTACT PERSON: MICHELE SANMARTIN
RAPID THERMAL ANNEALING/PROCESS

CLEAN ROOM ISO 5 (100 CLASS)

MANUFACTURER: JIPELEC

  • ULTRA HT ANNEALING RF FURNACE
  • 2 cm WIDE HOLDER
  • APPROVED MATERIAL: Si and SiC
  • RAMP UP TO to 40°C/s in Ar ENVIRONMENT
  • TEMPERATURE RANGE: 750 -1950 °C
  • FURNACE CONTROL MODIFIED IN HOUSE

CONTACT PERSON: ROBERTA NIPOTI

MANUFACTURER: LPT

  • RTP TWIN SYSTEM
  • QUARTZ LOLLIPOP FOR 4 inch SUBSTRATE and PIECES
  • APPROVED MATERIAL: Si, Sic, and Ge
  • RAMP UP TO 250°C/s
  • TEMPERATURE RANGE: 400 -1100 °C

 

PASSIVATION OF SILICON WAVEGUIDE BY LPCVD Si3N4 1500 nm THICK LPCVD TEOS ON DEEP TRENCHES

SUSPENDED STRESS FREE  DIELECTRIC MEMBRANE Carbon nanotubes on-site grown in an SiO2 well (up) and inside the nanopores of an Al2O3 matrix (down). Graphene foams of varying density obtained by using Ni (left) or Ni nanoparticles foams (right)

 

 MICRO/NANO FABRICATION HOME PAGE 

Research Topics