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This paper reports on the defects created in a 6H-SiC p-type substrate by a process of ion implantation and a quite low temperature annealing (1300 C), suitable for the realization of the source/drain regions of a MOSFET because it does not give rise to step bunching phenomena. Current voltage measurements showed the presence of a group of diodes featured by excess current. The effects of defects under the implanted layer on the transport properties of the diodes were investigated by DLTS: four hole traps were detected in all the measured diodes; besides, a broadened peak around 550 K was detected in the diodes that show excess current.
Trans Tech Publications Ltd
Publication date: 
1 Jan 2006

Mariaconcetta Canino, Antonio Castaldini, Anna Cavallini, Francesco Moscatelli, Roberta Nipoti, Antonella Poggi

Biblio References: 
Volume: 527 Pages: 811-814
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